1つのシーケンスの各クロックパルスでLEDシーケンスを変更するプログラムを作成する必要があります。VHDLクロックLEDシーケンスパート2
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.numeric_std.all;
entity REG_LED is
PORT(CLK: IN std_logic; -- CLK input
LEDS: Out std_logic_vector (4 downto 0):= "11111"); -- initialise output
End REG_LED;
ARCHITECTURE behavioral OF REG_LED IS
SIGNAL Temp: std_logic_vector (3 downto 0):= "0000"; -- initailise comparison signal
BEGIN
CLK_Process: PROCESS (CLK) -- begin
BEGIN
if rising_edge(CLK) Then
Temp <= Temp + 1 ;
END IF;
iF TEMP > "1000" THEN
Temp <= "XXXX";
End IF;
END PROCESS ;
LED_PROCESS: Process (Temp) --
BEGIN
Case Temp is
When "0000" =>
LEDS <= "11111";
When "0001" =>
LEDS <= "00001";
When "0010" =>
LEDS <= "00001";
When "0011" =>
LEDS <= "11111";
When "0100" =>
LEDS <= "00000";
When "0101" =>
LEDS <= "11111";
When "0110" =>
LEDS <= "00100";
When "0111" =>
LEDS <= "01010";
When "1000" =>
LEDS <= "10001";
When others =>
LEDS <= "10001";
End Case;
End Process;
END behavioral;
これはあなたの予想どおりですか?それをシミュレートしますが、テストするハードウェアがあるので、コードの合成をテストできません。それとも、もし私がVHDLを初めて使ったので道があれば、私はそれをテストする方法を工夫していない。
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.numeric_std.all;
entity REG_LED is
PORT(CLK: IN std_logic; -- CLK input
LEDS: Out std_logic_vector (4 downto 0):= "11111"); -- initialise output
End REG_LED;
ARCHITECTURE behavioral OF REG_LED IS
SIGNAL Temp: integer range 0 to 9:= 0; -- initailise comparison signal
BEGIN
CLK_Process: PROCESS (CLK) -- begin
BEGIN
if rising_edge(CLK) Then
if Temp = 8 then
Temp <= 0; -- State Count Reset
else
Temp <= Temp + 1 ; -- State Count
End if;
END IF;
END PROCESS ;
LED_PROCESS: Process (Temp) -- LED Outputs based on Temp count
BEGIN
Case Temp is
When 0 =>
LEDS <= "11111"; -- S0
When 1 =>
LEDS <= "00001"; -- S1
When 2 =>
LEDS <= "00001"; -- S2
When 3 =>
LEDS <= "11111"; -- S3
When 4 =>
LEDS <= "00000"; -- S4
When 5 =>
LEDS <= "11111"; -- S5
When 6 =>
LEDS <= "00100"; -- S6
When 7 =>
LEDS <= "01010"; -- S7
When 8 =>
LEDS <= "10001"; -- S8
When others =>
LEDS <= "11111"; -- Restart Sequence
End Case;
End Process;
'Temp <=" XXXX "; –
シーケンスを止めることを意図していましたが、元の割り当てを再読み込みして仕様を再設計して以来、私は考えていました。 –